Silicon IP and chip provider Rambus announced that it has achieved a record 4 Gbps performance with the Rambus HBM2E memory interface solution consisting of a fully-integrated PHY and controller. It can deliver 460 GB/s of bandwidth from a single HBM2E device when its paired with HBM2E DRAM from SK hynix operating at 3.6 Gbps. The achievement meets bandwidth needs accelerators targeting the most demanding AI/ML training and high-performance computing applications.
Rambus HBM2E memory subsystem
According to the announcement, Rambus teamed with SK hynix and Alchip to implement the HBM2E 2.5D system to validate in silicon the Rambus HBM2E PHY and Memory Controller IP using TSMC’s N7 process and CoWoS advanced packaging technologies. Benefits of the Rambus HBM2E Memory Interface (PHY and Controller):
- Achieves the industry’s highest speed of 4 Gbps per pin, delivering a system bandwidth of 460 GB from a single 3.6 Gbps HBM2E DRAM 3D device.
- Fully-integrated and verified HBM2E PHY and Controller reduces ASIC design complexity and speeds time to market
- Includes 2.5D package and interposer reference design as part of IP license
- Provides access to Rambus system and SI/PI experts helping ASIC designers to ensure maximum signal and power integrity for devices and systems
- Features LabStation development environment that enables quick system bring-up, characterization, and debug
- Supports high-performance applications including state-of-the-art AI/ML training and high-performance computing (HPC) systems
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